karpathy--llm.c
266 行
10 KiB
C++
266 行
10 KiB
C++
/*
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Common utilities for CUDA code.
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*/
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#ifndef CUDA_COMMON_H
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#define CUDA_COMMON_H
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#include <math.h>
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#include <string>
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#include <cuda_runtime.h>
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#include <nvtx3/nvToolsExt.h>
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#include <cuda_profiler_api.h>
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#include <cuda_bf16.h>
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// ----------------------------------------------------------------------------
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// Global defines and settings
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// WarpSize is not a compile time constant
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// Defining here like this possibly allows the compiler to optimize better
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#define WARP_SIZE 32U
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// try to make sure that 2 blocks fit on A100/H100 to maximise latency tolerance
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// this needs to be defines rather than queried to be used for __launch_bounds__
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#if __CUDA_ARCH__ == 800 || __CUDA_ARCH__ >= 900
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#define MAX_1024_THREADS_BLOCKS 2
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#else
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#define MAX_1024_THREADS_BLOCKS 1
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#endif
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// convenience macro for calculating grid/block dimensions for kernels
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#define CEIL_DIV(M, N) (((M) + (N)-1) / (N))
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// ----------------------------------------------------------------------------
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// Error checking
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// CUDA error checking
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void inline cudaCheck(cudaError_t error, const char *file, int line) {
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if (error != cudaSuccess) {
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printf("[CUDA ERROR] at file %s:%d:\n%s\n", file, line, cudaGetErrorString(error));
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exit(EXIT_FAILURE);
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}
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};
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#define cudaCheck(err) (cudaCheck(err, __FILE__, __LINE__))
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// ----------------------------------------------------------------------------
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// CUDA Precision settings and defines
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enum PrecisionMode {
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PRECISION_FP32,
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PRECISION_FP16,
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PRECISION_BF16
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};
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// Specific configurations based on the enabled precision
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#if defined(ENABLE_FP32)
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typedef float floatX;
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#define PRECISION_MODE PRECISION_FP32
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// use fp16 (note: this may require gradient scaler, currently not implemented!)
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#elif defined(ENABLE_FP16)
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typedef half floatX;
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#define PRECISION_MODE PRECISION_FP16
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#else // Default to bfloat16
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typedef __nv_bfloat16 floatX;
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#define PRECISION_MODE PRECISION_BF16
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#endif
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// ----------------------------------------------------------------------------
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// Load and store with streaming cache hints
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// Older nvcc does not provide __ldcs and __stcs for bfloat16, despite these
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// actually just being unsigned shorts. We need to be careful here to only define
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// our own versions if none already exist, otherwise the compiler will complain.
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// If not, you easily get "no viable overload" (for sm52) and "function already exists" (sm_80)
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#if defined(ENABLE_BF16) && (__CUDACC_VER_MAJOR__ < 12) && !((__CUDA_ARCH__ >= 800) || !defined(__CUDA_ARCH__))
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__device__ floatX __ldcs(const floatX* address) {
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unsigned short bf = __ldcs(reinterpret_cast<const unsigned short*>(address));
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return __nv_bfloat16_raw{bf};
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}
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__device__ void __stcs(floatX* address, floatX value) {
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__stcs(reinterpret_cast<unsigned short*>(address), ((__nv_bfloat16_raw)value).x);
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}
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#endif
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// ----------------------------------------------------------------------------
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// Packed128 data structure that forces the compiler to use 128-bit loads/stores
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// in GPUs that support (the LDG.128 and STS.128 instructions)
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// This is a bit similar to the use of float4 in the case of 32-bit floats, but
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// supports arbitrary precision.
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template<class ElementType>
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struct alignas(16) Packed128 {
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Packed128() = default;
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__device__ explicit Packed128(int4 bits) {
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static_assert(sizeof(bits) == sizeof(payload), "Size mismatch.");
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memcpy(&payload, &bits, sizeof(bits));
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}
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__device__ static Packed128 constant(ElementType value) {
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Packed128 result;
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for(int k = 0; k < size; ++k) {
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result.payload[k] = value;
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}
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return result;
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}
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__device__ static Packed128 zeros() {
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return constant(0.f);
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}
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__device__ static Packed128 ones() {
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return constant(1.f);
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}
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__device__ ElementType& operator[](int index) {
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return payload[index];
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}
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__device__ const ElementType& operator[](int index) const {
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return payload[index];
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}
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__device__ int4 get_bits() const {
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int4 bits;
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static_assert(sizeof(bits) == sizeof(payload), "Size mismatch.");
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memcpy(&bits, &payload, sizeof(bits));
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return bits;
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}
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static constexpr const size_t size = sizeof(int4) / sizeof(ElementType);
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ElementType payload[size];
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};
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// load a Packed128 from an aligned memory address
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template<class ElementType>
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__device__ Packed128<ElementType> load128(const ElementType* address) {
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return Packed128<ElementType>{*reinterpret_cast<const int4*>(address)};
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}
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// load a Packed128 from an aligned memory address with streaming cache hint
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template<class ElementType>
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__device__ Packed128<ElementType> load128cs(const ElementType* address) {
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return Packed128<ElementType>{__ldcs(reinterpret_cast<const int4*>(address))};
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}
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// store a Packed128 to an aligned memory address
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template<class ElementType>
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__device__ void store128(ElementType* target, Packed128<ElementType> value) {
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*reinterpret_cast<int4*>(target) = value.get_bits();
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}
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// store a Packed128 to an aligned memory address with streaming cache hint
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template<class ElementType>
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__device__ void store128cs(ElementType* target, Packed128<ElementType> value) {
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__stcs(reinterpret_cast<int4*>(target), value.get_bits());
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}
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// store a Packed128 to an aligned memory address while caching in L2 but bypassing L1
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template<class ElementType>
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__device__ void store128cg(ElementType* target, Packed128<ElementType> value) {
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__stcg(reinterpret_cast<int4*>(target), value.get_bits());
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}
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// short-form typedefs
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typedef Packed128<float> f128;
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typedef Packed128<floatX> x128;
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// ----------------------------------------------------------------------------
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// Warp/Block communication primitives
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// warp-level reduction for summing values
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__device__ inline float warpReduceSum(float val) {
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for (int offset = 16; offset > 0; offset /= 2) {
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val += __shfl_xor_sync(0xFFFFFFFF, val, offset);
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}
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return val;
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}
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// warp-level reduction for finding the maximum value
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__device__ inline float warpReduceMax(float val) {
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for (int offset = 16; offset > 0; offset /= 2) {
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val = fmaxf(val, __shfl_xor_sync(0xFFFFFFFF, val, offset));
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}
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return val;
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}
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// requires all 32 threads in the warp to be active, but should work for any block size
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// uses non-dynamic shared memory so every call increases shared memory requirements by 128 bytes
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// the fact it's unique shared memory allows us to avoid an extra __syncthreads() call at the end
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// but if called inside a loop, the shared memory will be implicitly reused, so set final_sync to 1
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using reduction_func_t = float (*) (float);
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template<reduction_func_t warp_reduction>
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__device__ inline float blockReduce(float val, bool final_sync=false, float out_of_bounds=0.0f) {
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// two reductions of up to 1024 threads:
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// 1) inside warp (shuffle), 2) cross-warp (shared memory), 3) inside warp (shuffle)
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__shared__ float shared_val[WARP_SIZE];
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const int lane_id = threadIdx.x % WARP_SIZE;
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const int warp_id = threadIdx.x / WARP_SIZE;
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const int num_warps = blockDim.x / WARP_SIZE;
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float warp_val = warp_reduction(val);
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if (lane_id == 0) { shared_val[warp_id] = warp_val; }
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__syncthreads();
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warp_val = (lane_id < num_warps) ? shared_val[lane_id] : out_of_bounds;
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float block_val = warp_reduction(warp_val);
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if (final_sync) {
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__syncthreads(); // only needed in loops when effectively reusing shared memory etc.
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}
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return block_val;
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}
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// ----------------------------------------------------------------------------
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// Random Number Generation used in Stochastic Rounding
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// SquirrelNoise5 - Squirrel's Raw Noise utilities (version 5)
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// This gives us a random number from threadIdx/blockIdx + a single seed for the entire GPU
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// todo - possibly overkill and we don't need such high quality random numbers? (tbd)
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// http://eiserloh.net/noise/SquirrelNoise5.hpp
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__device__ __host__ constexpr unsigned int SquirrelNoise5(int positionX, unsigned int seed)
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{
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constexpr unsigned int SQ5_BIT_NOISE1 = 0xd2a80a3f; // 11010010101010000000101000111111
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constexpr unsigned int SQ5_BIT_NOISE2 = 0xa884f197; // 10101000100001001111000110010111
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constexpr unsigned int SQ5_BIT_NOISE3 = 0x6C736F4B; // 01101100011100110110111101001011
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constexpr unsigned int SQ5_BIT_NOISE4 = 0xB79F3ABB; // 10110111100111110011101010111011
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constexpr unsigned int SQ5_BIT_NOISE5 = 0x1b56c4f5; // 00011011010101101100010011110101
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unsigned int mangledBits = (unsigned int) positionX;
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mangledBits *= SQ5_BIT_NOISE1;
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mangledBits += seed;
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mangledBits ^= (mangledBits >> 9);
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mangledBits += SQ5_BIT_NOISE2;
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mangledBits ^= (mangledBits >> 11);
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mangledBits *= SQ5_BIT_NOISE3;
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mangledBits ^= (mangledBits >> 13);
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mangledBits += SQ5_BIT_NOISE4;
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mangledBits ^= (mangledBits >> 15);
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mangledBits *= SQ5_BIT_NOISE5;
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mangledBits ^= (mangledBits >> 17);
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return mangledBits;
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}
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__device__ __host__ constexpr unsigned int Get2dNoiseUint(int indexX, int indexY, unsigned int seed)
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{
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constexpr int PRIME_NUMBER = 198491317; // Large prime number with non-boring bits
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return SquirrelNoise5(indexX + (PRIME_NUMBER * indexY), seed);
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}
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// stochastic rounding built on top of Squirel Noise above (with seed updated per step via xorshift)
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__device__ __forceinline__ void stochastic_rounding(float in, __nv_bfloat16 *out, unsigned int seed) {
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// todo - is this stochastic rounding *too good*? can we cut any corners?
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unsigned int random = Get2dNoiseUint(threadIdx.x, blockIdx.x, seed);
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unsigned int threshold = random & 0xFFFF;
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unsigned int float_bits = __float_as_uint(in);
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unsigned int rounded_bits = float_bits & 0x0000FFFF;
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float_bits = (rounded_bits > threshold) ? (float_bits | 0xFFFF) : (float_bits & ~0xFFFF);
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*out = __float2bfloat16_rn(__uint_as_float(float_bits));
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}
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__device__ __forceinline__ void stochastic_rounding(float in, half *out, unsigned int random) {
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*out = (float)in; // todo - implement this...
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}
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__device__ __forceinline__ void stochastic_rounding(float in, float *out, unsigned int random) {
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*out = in; // dummy function for when floatX is float (FP32 mode)
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}
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// ----------------------------------------------------------------------------
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// Profiler utils
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class NvtxRange {
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public:
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NvtxRange(const char* s) { nvtxRangePush(s); }
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NvtxRange(const std::string& base_str, int number) {
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std::string range_string = base_str + " " + std::to_string(number);
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nvtxRangePush(range_string.c_str());
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}
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~NvtxRange() { nvtxRangePop(); }
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};
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#define NVTX_RANGE_FN() NvtxRange nvtx_range(__FUNCTION__)
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#endif // CUDA_COMMON_H
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